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Ashish Singhal

1111 SW 16th Avenue
Apt # 124 Park 16
Gainesville, Florida-32601
USA

Cell: +1-302-725-9508

Email: myself@ashishsinghal.in, asinghal@cise.ufl.edu, ashishsinghal@ufl.edu

Web: www.ashishsinghal.in

Objective

Engaging in innovative research in the field of Embedded Systems and Computer Architecture, and to participate in developing novel products for the society by capitalizing upon my academic and hands-on knowledge.

Education

Areas of Interest

• Embedded Systems
• Computer Architecture.
• Wireless Networks

Research Experience

• Research Intern at Central Computing Facility, National Physical Laboratory, Delhi

Implemented TCP/IP and USB drivers in FreeRTOS for ATMEL series of microcontrollers. This was done as a part of their BrainOxy Meter Project in the winter of 2006.

Supervisors: Dr. Ravi Mehrotra and Dr. Ashish Ranjan

• Research Intern at Cryogenics Department, National Physical Laboratory, Delhi

Worked on CMR materials to be used in designing spintronic mamories and High Capacity memory systems. This project was carried out as a part of CMR material development project in the summer of 2005.

Supervisor: Dr. S. K. Agarwal

Publications and Presentations

• Ashish Singhal, Neeraj Panwar and Dr. S. K. Agarwal
  Improvements in conduction and magnetix properties of CMR Materials. In the proceedings of International Conference on Advanced materials(ICAM), 2007.

Projects and Industrial Internships

• Surveillance Redefined

Developed a tool for generating 3D model of an object given its two or more 2D images. The system can be used in automated surveillance systems that require very less human involvement. The project had been generously funded by Naval Research Board.

Supervisors:

1. Prof. Asok Bhattacharyya, Principal , Delhi College of Engineering

2. Mrs. S. Indu, Senior Lecturer, E&C Engg. Dept., Delhi College of Engineering, sindu@dce.ac.in

• Data Logger

Designed a data logger system during my internship at Kritikal Solutions Pvt Ltd. The device is to be used in the Indian Railway’s network and will be heavily used for signalling and avoiding accidents. My module was to deal with all the analog signals and their logging with timestamping.

Supervisors

1. Mr. Nishant Sharma, Director and Head Architect, Embedded Systems group, Kritikal Solutions Pvt Ltd, nishants@kritikalsolutions.com

2. Mr. Rana Das, Senior Design Engineer, Embedded Systems group, Kritikal Solutions Pvt Ltd, ranad@kritikalsolutions.com

• Mediation Hawk-Eye

Designed a system which could keep a check on all the servers attached to switches of Airtel's GSM network all over the country. The system keeps a track of all the failures and alerts the administration about them

Supervisor:

Mr. Narendra K. Tyagi, Advisory Project Manager, IBM India Pvt Ltd, nartyagi@in.ibm.com

• Very Simple CPU

Designed a very simple CPU which could execute 16 instructions. This project was carried out as a matter of interest after studying computer system organisation.

Supervisor:

Mr. Rajesh Rohilla, Associate HOD and Asst Professor, E&C Engg Dept, Delhi College of Engineering, rajesh@dce.ac.in

Technical Skills

Achievements

• 2nd position at Bits - the predefined software design competition held in DCE.
• Secured rank 379 out of 50000 candidates appearing for Combined Entrance Exam(CEE) 2004
• Present in 'Hall of Fame - 2004' in Higher Secondary.
• 'Group Head' for 'Physics Discussion Forum' in Higher Secondary (10+2)

Professional Memberships

• Student Member of Institute of Electrical and Electronics Engineers (IEEE)
• Student Member of Computer Society of India (CSI)